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1 ltc1474/ltc1475 low quiescent current high efficiency step-down converters load current (ma) efficiency (%) 100 90 80 70 60 50 0.03 3 300 1474/75 ta01 0.3 30 v in = 5v v in = 10v v in = 15v l = 100 h v out = 3.3v r sense = 0 ltc1474 efficiency figure 1. high efficiency step-down converter v in gnd sense lbi run v fb lbo sw ltc1474-3.3 + 6 3 8 1 2 5 7 4 100k low battery in run shdn 0.1 f 10 f 25v v in 4v to 18v low battery out 1474/75 f01 l1 100 h d1 mbr0530 + 100 f 6.3v v out 3.3v at 250ma l1 = sumida cdrh74-101 features descriptio n u n high efficiency: over 92% possible n very low standby current: 10 m a typ n available in space saving 8-lead msop package n internal 1.4 w power switch (v in = 10v) n wide v in range: 3v to 18v operation n very low dropout operation: 100% duty cycle n low-battery detector functional during shutdown n programmable current limit with optional current sense resistor (10ma to 400ma typ) n short-circuit protection n few external components required n active low micropower shutdown: i q = 6 m a typ n pushbutton on/off (ltc1475 only) n 3.3v, 5v and adjustable output versions the lt c ? 1474/ltc1475 series are high efficiency step- down converters with internal p-channel mosfet power switches that draw only 10 m a typical dc supply current at no load while maintaining output voltage. the ltc1474 uses logic-controlled shutdown while the ltc1475 fea- tures pushbutton on/off. the low supply current coupled with burst mode tm opera- tion enables the ltc1474/ltc1475 to maintain high effi- ciency over a wide range of loads. these features, along with their capability of 100% duty cycle for low dropout and wide input supply range, make the ltc1474/ltc1475 ideal for moderate current (up to 300ma) battery-powered applications. the peak switch current is user-programmable with an optional sense resistor (defaults to 325ma minimum if not used) providing a simple means for optimizing the design for lower current applications. the peak current control also provides short-circuit protection and excellent start- up behavior. a low-battery detector that remains functional in shutdown is provided . the ltc1474/ltc1475 series availability in 8-lead msop and so packages and need for few additional components provide for a minimum area solution. applicatio n s u n cellular telephones and wireless modems n 4ma to 20ma current loop step-down converter n portable instruments n battery-operated digital devices n battery chargers n inverting converters n intrinsic safety applications typical applicatio n u , ltc and lt are registered trademarks of linear technology corporation. burst mode is a trademark of linear technology corporation.
2 ltc1474/ltc1475 absolute m axi m u m ratings w ww u operating ambient temperature range commercial ............................................ 0 c to 70 c industrial ............................................ C 40 c to 85 c junction temperature (note 1) ............................ 125 c storage temperature range ................. C 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c input supply voltage (v in ).........................C 0.3v to 20v switch current (sw, sense) .............................. 750ma switch voltage (sw).............. (v in C 20v) to (v in + 0.3v) v fb (adjustable versions) ..........................C 0.3v to 12v v out (fixed versions) ................................ C0.3v to 20v lbi, lbo ....................................................C 0.3v to 20v run, sense .................................. C 0.3v to (v in + 0.3v) package/order i n for m atio n w u u s8 part marking 1475 1475i 14753 14755 consult factory for military grade parts. 1474 1474i 14743 14745 14743i 14745i ltbw ltcr ltcs ms8 part marking ltbk ltcp ltcq ms8 part marking s8 part marking top view s8 package 8-lead plastic so 1 2 3 4 8 7 6 5 v out /v fb lbo lbi gnd run v in sense sw top view s8 package 8-lead plastic so 1 2 3 4 8 7 6 5 v out /v fb lbo lbi/off gnd on v in sense sw 1 2 3 4 v out /v fb lbo lbi gnd 8 7 6 5 run v in sense sw top view ms8 package 8-lead plastic msop 1 2 3 4 v out /v fb lbo lbi/off gnd 8 7 6 5 on v in sense sw top view ms8 package 8-lead plastic msop t jmax = 125 c, q ja = 150 c/ w t jmax = 125 c, q ja = 110 c/ w t jmax = 125 c, q ja = 110 c/ w t jmax = 125 c, q ja = 150 c/ w order part number order part number order part number order part number ltc1475cms8 ltc1475cms8-3.3 ltc1475cms8-5 ltc1474cs8 ltc1474is8 ltc1474cs8-3.3 ltc1474cs8-5 ltc1474is8-3.3 ltc1474is8-5 ltc1474cms8 ltc1474cms8-3.3 ltc1474cms8-5 ltc1475cs8 ltc1475is8 ltc1475cs8-3.3 ltc1475cs8-5
3 ltc1474/ltc1475 symbol parameter conditions min typ max units v fb feedback voltage i load = 50ma l 1.205 1.230 1.255 v ltc1474/ltc1475 v out regulated output voltage i load = 50ma ltc1474-3.3/ltc1475-3.3 l 3.234 3.300 3.366 v ltc1474-5/ltc1475-5 l 4.900 5.000 5.100 v i fb feedback current l 030 na ltc1474/ltc1475 only i supply no load supply current (note 3) i load = 0 (figure 1 circuit) 10 m a d v out output voltage line regulation v in = 7v to 12v, i load = 50ma 5 20 mv output voltage load regulation i load = 0ma to 50ma 2 15 mv output ripple i load = 10ma 50 mv p-p i q input dc supply current (note 2) (exclusive of driver gate charge current) active mode (switch on) v in = 3v to 18v 100 175 m a sleep mode (note 3) v in = 3v to 18v 9 15 m a shutdown v in = 3v to 18v, v run = 0v 6 12 m a r on switch resistance i sw = 100ma 1.4 1.6 w i peak current comp max current trip threshold r sense = 0 w 325 400 ma r sense = 1.1 w 70 76 85 ma v sense current comp sense voltage trip threshold l 90 100 110 mv v hyst voltage comparator hysteresis 5mv t off switch off-time v out at regulated value 3.5 4.75 6.0 m s v out = 0v 65 m s v lbi, trip low battery comparator threshold l 1.16 1.23 1.27 v v run run/on pin threshold 0.4 0.7 1.0 v v lbi, off off pin threshold (ltc1475 only) 0.4 0.7 1.0 v i lbo, sink sink current into pin 2 v lbi = 0v, v lbo = 0.4v 0.45 0.70 ma i run, source source current from pin 8 v run = 0v 0.4 0.8 1.2 m a i sw, leak switch leakage current v in = 18v, v sw = 0v, v run = 0v 0.015 1 m a i lbi, leak leakage current into pin 3 v lbi = 18v, v in = 18v 0 0.1 m a i lbo, leak leakage current into pin 2 v lbi = 2v, v lbo = 5v 0 0.5 m a electrical characteristics t a = 25 c, v in = 10v, v run = open, r sense = 0, unless otherwise noted. the l denotes specifications which apply over the full operating temperature range. n ote 1: t j is calculated from the ambient temperature t a and power dissipation p d according to the following formulas: ltc1474cs8/ltc1475cs8: t j = t a + (p d ? 110 c/w) ltc1474cms8/ltc1475cms8: t j = t a + (p d ? 150 c/w) note 2 : dynamic supply current is higher due to the gate charge being delivered at the switching frequency. see applications information. note 3 : no load supply current consists of sleep mode dc current (9 m a typical) plus a small switching component (about 1 m a for figure 1 circuit) necessary to overcome schottky diode and feedback resistor leakage.
4 ltc1474/ltc1475 typical perfor m a n ce characteristics u w current trip threshold vs temperature switch resistance vs input voltage supply current in shutdown temperature ( c) 0 current trip threshold (ma) 80 1474/75 g04 20 40 60 500 400 300 200 100 0 v in = 10v r sense = 0 w r sense = 1.1 w input voltage (v) 0 r ds(on) ( w ) 20 1474/75 g05 5 10 15 5 4 3 2 1 0 t = 70 c t = 25 c input voltage (v) 0 supply current ( m a) 20 1474/75 g06 5 10 15 10.0 7.5 5.0 2.5 0 switch leakage current vs temperature v in dc supply current off-time vs output voltage % of regulated output voltage (%) 0 off-time ( m s) 100 1474/75 g09 20 40 60 80 80 60 40 20 0 v in = 10v input voltage (v) 0 supply current ( m a) 4 8 16 20 1474/75 g08 12 120 100 80 60 40 20 0 active mode sleep mode temperature ( c) 0 leakage current ( m a) 1474/75 g07 40 60 80 100 1.0 0.8 0.6 0.4 0.2 0 20 v in = 18v efficiency vs input voltage line regulation load regulation input voltage (v) 0 efficiency (%) 4 8 16 1474/75 g01 12 100 95 90 85 80 75 70 i load = 25ma i load = 200ma figure 1 circuit l: cdrh73-101 i load = 1ma input voltage (v) 0 ? v out (mv) 4 8 16 1474/75 g02 12 40 30 20 10 0 10 ?0 figure 1 circuit i load = 100ma r sense = 0.33 w r sense = 0 w load current (ma) 0 ? v out (mv) 40 30 20 10 0 ?0 ?0 ?0 1474/75 g03 100 250 50 150 200 300 figure 1 circuit v in = 15v v in = 10v v in = 5v
5 ltc1474/ltc1475 fu n ctio n al diagra uu w ltc1474: lbi ltc1475: lbi/off + + + 1 m a lbi/off lbo 4.75 m s 1-shot 1.23v reference gnd 1474/75 fd 4 2 8 1.23v 1m 3m (5v version) 1.68m (3.3v version) ready stretch v cc v in v in v out v out /v fb 1 c on v lb on 5 w sw sense r sense (optional) 20 100mv wakeup trigger out ltc1474: run ltc1475: on 1 5 6 7 + + connection not present in ltc1474 series connection present in ltc1474 series only 3 output divider is implemented externally in adjustable versions pi n fu n ctio n s uuu v out /v fb (pin 1): feedback of output voltage. in the fixed versions, an internal resistive divider divides the output voltage down for comparison to the internal 1.23v refer- ence. in the adjustable versions, this divider must be implemented externally. lbo (pin 2): open drain output of the low battery comparator. this pin will sink current when pin 3 is below 1.23v. lbi/off (pin 3): input to low battery comparator. this input is compared to the internal 1.23v reference. for the ltc1475, a momentary ground on this pin puts regulator in shutdown mode. gnd (pin 4): ground pin. sw (pin 5): drain of internal pmos power switch. cath- ode of schottky diode must be closely connected to this pin. sense (pin 6): current sense input for monitoring switch current and source of internal pmos power switch. maximum switch current is programmed with a resistor between sense and v in pins. v in (pin 7): main supply pin. run/on (pin 8): on ltc1474, voltage level on this pin controls shutdown/run mode (ground = shutdown, open/ high = run). on ltc1475, a momentary ground on this pin puts regulator in run mode. a 100k series resistor must be used between pin 8 and the switch or control voltage.
6 ltc1474/ltc1475 operatio u (refer to functional diagram) the ltc1474/ltc1475 are step-down converters with internal power switches that use burst mode operation to keep the output capacitor charged to the proper output voltage while minimizing the quiescent current. burst mode operation functions by using short burst cycles to ramp the inductor current through the internal power switch and external schottky diode, followed by a sleep cycle where the power switch is off and the load current is supplied by the output capacitor. during sleep mode, the ltc1474/ltc1475 draw only 9 m a typical supply current. at light loads, the burst cycles are a small percentage of the total cycle time; thus the average supply current is very low, greatly enhancing efficiency. burst mode operation at the beginning of the burst cycle, the switch is turned on and the inductor current ramps up. at this time, the internal current comparator is also turned on to monitor the switch current by measuring the voltage across the internal and optional external current sense resistors. when this volt- age reaches 100mv, the current comparator trips and pulses the 1-shot timer to start a 4.75 m s off-time during which the switch is turned off and the inductor current ramps down. at the end of the off-time, if the output voltage is less than the voltage comparator threshold, the switch is turned back on and another cycle commences. to minimize supply current, the current comparator is turned on only during the switch-on period when it is needed to monitor switch current. likewise, the 1-shot timer will only be on during the 4.75 m s off-time period. the average inductor current during a burst cycle will normally be greater than the load current, and thus the output voltage will slowly increase until the internal volt- age comparator trips. at this time, the ltc1474/ltc1475 go into sleep mode, during which the power switch is off and only the minimum required circuitry is left on: the voltage comparator, reference and low battery compara- tor. during sleep mode, with the output capacitor supply- ing the load current, the v fb voltage will slowly decrease until it reaches the lower threshold of the voltage com- parator (about 5mv below the upper threshold). the voltage comparator then trips again, signaling the ltc1474/ ltc1475 to turn on the circuitry necessary to begin a new burst cycle. peak inductor current programming the current comparator provides a means for program- ming the maximum inductor/switch current for each switch cycle. the 1x sense mosfet, a portion of the main power mosfet, is used to divert a sample (about 5%) of the switch current through the internal 5 w sense resistor. the current comparator monitors the voltage drop across the series combination of the internal and external sense resistors and trips when the voltage exceeds 100mv. if the external sense resistor is not used (pins 6 and 7 shorted), the current threshold defaults to the 400ma maximum due to the internal sense resistor. off-time the off-time duration is 4.75 m s when the feedback voltage is close to the reference; however, as the feedback voltage drops, the off-time lengthens and reaches a maximum value of about 65 m s when this voltage is zero. this ensures that the inductor current has enough time to decay when the reverse voltage across the inductor is low such as during short circuit. shutdown mode both ltc1474 and ltc1475 provide a shutdown mode that turns off the power switch and all circuitry except for the low battery comparator and 1.23v reference, further reducing dc supply current to 6 m a typical. the ltc1474s run/shutdown mode is controlled by a voltage level at the run pin (ground = shutdown, open/high = run). the ltc1475s run/shutdown mode, on the other hand, is controlled by an internal s/r flip-flop to provide pushbutton on/off control. the flip-flop is set (run mode) by a momen- tary ground at the on pin and reset (shutdown mode) by a momentary ground at the lbi/off pin. low battery comparator the low battery comparator compares the voltage on the lbi pin to the internal reference and has an open drain n-channel mosfet at its output. if lbi is above the reference, the output fet is off and the lbo output is high impedance. if lbi is below the reference, the output fet is on and sinks current. the comparator is still active in shutdown.
7 ltc1474/ltc1475 applicatio n s i n for m atio n wu u u ments. lower peak currents have the advantage of lower output ripple ( d v out = i peak ? esr), lower noise, and less stress on alkaline batteries and other circuit components. also, lower peak currents allow the use of inductors with smaller physical size. peak currents as low as 10ma can be programmed with the appropriate sense resistor. increasing r sense above 10 w , however, gives no further reduction of i peak . for r sense values less than 1 w , it is recommended that the user parallel standard resistors (available in values 3 1 w ) instead of using a special low valued shunt resistor. although a single resisor could be used with the desired value, these low valued shunt resistor types are much more expensive and are currently not available in case sizes smaller than 1206. three or four 0603 size standard resistors require about the same area as one 1206 size current shunt resistor at a fraction of the cost. at higher supply voltages and lower inductances, the peak currents may be slightly higher due to current comparator overshoot and can be predicted from the second term in the following equation: i r vv l peak sense in out = + + () ? ? ? - () - 01 025 25 10 7 . . . (2) note that r sense only sets the maximum inductor current peak. at lower di/dt (lower input voltages and higher inductances), the observed peak current at loads less than i max may be less than this calculated peak value due to the voltage comparator tripping before the current ramps up high enough to trip the current comparator. this effect improves efficiency at lower loads by keeping the i 2 r losses down (see efficiency considerations section). inductor value selection once r sense and i peak are known, the inductor value can be determined. the minimum inductance recommended as a function of i peak and i max can be calculated from: l vvt ii min out d off peak max 3 + () - ? ? 075 . (3) where t off = 4.75 m s. maximum output current (ma) 0 r sense ( w ) 5 4 3 2 1 0 50 100 150 200 1474/75 f02 250 300 for lowest noise for best efficiency figure 2. r sense selection the basic ltc1474/ltc1475 application circuit is shown in figure 1, a high efficiency step-down converter. external component selection is driven by the load requirement and begins with the selection of r sense . once r sense is known, l can be chosen. finally d1, c in and c out are selected. r sense selection the current sense resistor (r sense ) allows the user to program the maximum inductor/switch current to opti- mize the inductor size for the maximum load. the ltc1474/ ltc1475 current comparator has a maximum threshold of 100mv/(r sense + 0.25). the maximum average output current i max is equal to this peak value less half the peak- to-peak ripple current d i l . allowing a margin for variations in the ltc1474/ltc1475 and external components, the required r sense can be calculated from figure 2 and the following equation: r sense = (0.067/i max ) C 0.25 (1) for 10ma < i max < 200ma. for i max above 200ma, r sense is set to zero by shorting pins 6 and 7 to provide the maximum peak current of 400ma (limited by the fixed internal sense resistor). this 400ma default peak current can be used for lower i max if desired to eliminate the need for the sense resistor and associated decoupling capacitor. however, for optimal performance, the peak inductor current should be set to no more than what is needed to meet the load current require-
8 ltc1474/ltc1475 applicatio n s i n for m atio n wu u u if the l min calculated is not practical, a larger i peak should be used. although the above equation provides the mini- mum, better performance (efficiency, line/load regulation, noise) is usually gained with higher values. at higher inductances, peak current and frequency decrease (im- proving efficiency) and inductor ripple current decreases (improving noise and line/load regulation). for a given inductor type, however, as inductance is increased, dc resistance (dcr) increases, increasing copper losses, and current rating decreases, both effects placing an upper limit on the inductance. the recommended range of inductances for small surface mount inductors as a func- tion of peak current is shown in figure 3. the values in this range are a good compromise between the trade-offs discussed above. if space is not a premium, inductors with larger cores can be used, which extends the recom- mended range of figure 3 to larger values. section, increased inductance requires more turns of wire and therefore copper losses will increase. ferrite and kool m m designs have very low core loss and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. ferrite core material saturates hard, which means that inductance collapses abruptly when the peak design current is exceeded. this results in an abrupt increase in inductor current above i peak and consequent increase in voltage ripple. do not allow the core to satu- rate! coiltronics, coilcraft, dale and sumida make high performance inductors in small surface mount packages with low loss ferrite and kool m m cores and work well in ltc1474/ltc1475 regulators. catch diode selection the catch diode carries load current during the off-time. the average diode current is therefore dependent on the p-channel switch duty cycle. at high input voltages the diode conducts most of the time. as v in approaches v out the diode conducts only a small fraction of the time. the most stressful condition for the diode is when the output is short-circuited. under this condition, the diode must safely handle i peak at close to 100% duty cycle. to maximize both low and high current efficiency, a fast switching diode with low forward drop and low reverse leakage should be used. low reverse leakage current is critical to maximize low current efficiency since the leak- age can potentially approach the magnitude of the ltc1474/ ltc1475 supply current. low forward drop is critical for high current efficiency since loss is proportional to for- ward drop. these are conflicting parameters (see table 1), but a good compromise is the mbr0530 0.5a schottky diode specified in the application circuits. table 1. effect of catch diode on performance forward no load diode (d1) leakage drop supply current efficiency* bas85 200na 0.6v 9.7 m a 77.9% mbr0530 1 m a 0.4v 10 m a 83.3% mbrs130 20 m a 0.3v 16 m a 84.6% *figure 1 circuit with v in = 15v, i out = 0.1a kool m m is a registered trademark of magnetics, inc. peak inductor current (ma) 10 50 500 inductor value ( h) 100 1000 100 1000 1474/75 f03 inductor core selection once the value of l is known, the type of inductor must be selected. high efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite, molypermalloy or kool m m ? cores. actual core loss is independent of core size for a fixed inductor value, but is very dependent on inductance selected. as inductance increases, core losses go down. unfortunately, as discussed in the previous figure 3. recommended inductor values
9 ltc1474/ltc1475 applicatio n s i n for m atio n wu u u c in and c out selection at higher load currents, when the inductor current is continuous, the source current of the p-channel mosfet is a square wave of duty cycle v out /v in . to prevent large voltage transients, a low esr input capacitor sized for the maximum rms current must be used. the maximum capacitor current is given by: c vvv v in out in out in required i = i rms max - () [] 12 / this formula has a maximum at v in = 2v out , where i rms = i out /2. this simple worst-case condition is com- monly used for design because even significant deviations do not offer much relief. note that capacitor manufacturers ripple current ratings are often based on 2000 hours of life. this makes it advisable to further derate the capacitor, or to choose a capacitor rated at a higher temperature than required. do not underspecify this component. an addi- tional 0.1 m f ceramic capacitor is also required on v in for high frequency decoupling. the selection of c out is driven by the required effective series resistance (esr) to meet the output voltage ripple and line regulation requirements. the output voltage ripple during a burst cycle is dominated by the output capacitor esr and can be estimated from the following relation: 25mv < d v out, ripple = d i l ? esr where d i l i peak and the lower limit of 25mv is due to the voltage comparator hysteresis. line regulation can also vary with c out esr in applications with a large input voltage range and high peak currents. esr is a direct function of the volume of the capacitor. manufacturers such as nichicon, avx and sprague should be considered for high performance capacitors. the os-con semiconductor dielectric capacitor available from sanyo has the lowest esr for its size at a somewhat higher price. typically, once the esr requirement is satis- fied, the capacitance is adequate for filtering. for lower current applications with peak currents less than 50ma, 10 m f ceramic capacitors provide adequate filtering and are a good choice due to their small size and almost negligible esr. avx and marcon are good sources for these capacitors. in surface mount applications multiple capacitors may have to be paralleled to meet the esr or rms current handling requirements of the application. aluminum elec- trolytic and dry tantalum capacitors are both available in surface mount configurations. in the case of tantalum, it is critical that the capacitors are surge tested for use in switching power supplies. an excellent choice is the avx tps series of surface mount tantalums, available in case heights ranging from 2mm to 4mm. other capacitor types include sanyo os-con, nichicon pl series and sprague 595d series. consult the manufacturer for other specific recommendations. to avoid overheating, the output capacitor must be sized to handle the ripple current generated by the inductor. the worst-case ripple current in the output capacitor is given by: i rms = i peak /2 once the esr requirement for c out has been met, the rms current rating generally far exceeds the i ripple(p-p) requirement. efficiency considerations the efficiency of a switching regulator is equal to the output power divided by the input power times 100%. it is often useful to analyze individual losses to determine what is limiting efficiency and which change would produce the most improvement. efficiency can be expressed as: efficiency = 100% C (l1 + l2 + l3 + ...) where l1, l2, etc. are the individual losses as a percentage of input power. although all dissipative elements in the circuit produce losses, three main sources usually account for most of the losses in ltc1474/ltc1475 circuits: v in current, i 2 r losses and catch diode losses. 1. the v in current is due to two components: the dc bias current and the internal p-channel switch gate charge current. the dc bias current is 9 m a at no load and increases proportionally with load up to a constant 100 m a during continuous mode. this bias current is so
10 ltc1474/ltc1475 applicatio n s i n for m atio n wu u u small that this loss is negligible at loads above a milliamp but at no load accounts for nearly all of the loss. the second component, the gate charge current, results from switching the gate capacitance of the internal p-channel switch. each time the gate is switched from high to low to high again, a packet of charge dq moves from v in to ground. the resulting dq/dt is the current out of v in which is typically much larger than the dc bias current. in continuous mode, i gatechg = fq p where q p is the gate charge of the internal switch. both the dc bias and gate charge losses are proportional to v in and thus their effects will be more pronounced at higher supply voltages. 2. i 2 r losses are predicted from the internal switch, inductor and current sense resistor. at low supply voltages where the switch on-resistance is higher and the switch is on for longer periods due to higher duty cycle, the switch losses will dominate. keeping the peak currents low with the appropriate r sense and with larger inductance helps minimize these switch losses. at higher supply voltages, these losses are proportional to load and result in the flat efficiency curves seen in figure 1. 3. the catch diode loss is due to the v d i d loss as the diode conducts current during the off-time and is more pro- nounced at high supply voltage where the on-time is short. this loss is proportional to the forward drop. however, as discussed in the catch diode section, diodes with lower forward drops often have higher leakage current, so although efficiency is improved, the no load supply current will increase. adjustable applications for adjustable versions, the output voltage is programmed with an external divider from v out to v fb (pin 1) as shown in figure 4. the regulated voltage is determined by: v out = 1.23 1+ r2 r1 ? ? ? ? (4) to minimize no-load supply current, resistor values in the megohm range should be used. the increase in supply current due to the feedback resistors can be calculated from: d= + ? ? ? ? ? ? ? ? i v rr v v vin out out in 12 a 10pf feedforward capacitor across r2 is necessary due to the high impedances to prevent stray pickup and improve stability. gnd v fb ltc1474 ltc1475 1 4 1474/75 f04 r2 r1 10pf v out lbi lbo ltc1474/ltc1475 1474/75 f05 r4 r3 1.23v reference v in + figure 4. ltc1474/ltc1475 adjustable configuration figure 5. low battery comparator low battery comparator the ltc1474/ltc1475 have an on-chip low battery com- parator that can be used to sense a low battery condition when implemented as shown in figure 5. the resistive divider r3/r4 sets the comparator trip point as follows: v r r trip =+ ? ? ? ? 123 1 4 3 . the divided down voltage at the lbi pin is compared to the internal 1.23v reference. when v lbi < 1.23v, the lbo output sinks current. the low battery comparator is active all the time, even during shutdown mode.
11 ltc1474/ltc1475 applicatio n s i n for m atio n wu u u ltc1475 pushbutton on/off and microprocessor interface the ltc1475 provides pushbutton control of power on/off for use with handheld products. a momentary ground on the on pin sets an internal s/r latch to run mode while a momentary ground on the lbi/off pin resets the latch to shutdown mode. see figure 6 for a comparsion of on/off operation of the ltc1474 and ltc1475 and figure 7 for a comparison of the circuit implementations. in the ltc1475, the lbi/off pin has a dual function as both the shutdown control pin and the low battery com- parator input. since the off pushbutton is normally open, it does not affect the normal operation of the low battery comparator. in the unpressed state, the lbi/off input is the divided down input voltage from the resistive divider to the internal low battery comparator and will normally be above or just below the trip threshold of 1.23v. when shutdown mode is desired, the lbi/off pin is pulled below the 0.7v threshold to invoke shutdown. the depressed switch state is detected by the microcon- troller through its input. the microcontroller then pulls the lbi/off pin low with the connection to one of its ouputs. with the lbi/off pin low, the ltc1475 powers down turning the microcontroller off. note that since the i/o pins of most microcontrollers have a reversed bias diode between input and supply, a blocking diode with less than 1 m a leakage is necessary to prevent the powered down microcontroller from pulling down on the on pin. figure 19 in the typical applications section shows how to use the low battery comparator to provide a low battery lockout on the on switch. the lbo output disconnects the pushbutton from the on pin when the comparator has tripped, preventing the ltc1475 from attempting to start up again until v in is increased. run run shutdown run run 1474/75 f06 shutdown run mode on overrides lbi/off while on is low ltc1474 ltc1475 on lbi/off mode figure 6. comparison of ltc1474 and ltc1475 run/shutdown operation the on pin has precedence over the lbi/off pin. as seen in figure 6, if both pins are grounded simultaneously, run mode wins. figure 18 in the typical applications section shows an example for the use of the ltc1475 to control on/off of a microcontroller with a single pushbutton. with both the microcontroller and ltc1475 off, depressing the pushbutton grounds the ltc1475 on pin and starts up the ltc1475 regulator which then powers up the microcon- troller. when the pushbutton is depressed a second time, 1474/75 f07 run on off run on lbi/off 100k ltc1474 ltc1475 100k v in figure 7. simplified implementation of ltc1474 and ltc1475 on/off absolute maximum ratings and latchup prevention the absolute maximum ratings specify that sw (pin 5) can never exceed v in (pin 7) by more than 0.3v. normally this situation should never occur. it could, however, if the output is held up while the supply is pulled down. a condition where this could potentially occur is when a battery is supplying power to an ltc1474 or ltc1475 regulator and also to one or more loads in parallel with the the regulators v in . if the battery is disconnected while the ltc1474 or ltc1475 regulator is supplying a light load and one of the parallel circuits is a heavy load, the input capacitor of the ltc1474 or ltc1475 regulator could be pulled down faster than the output capacitor, causing the absolute maximum ratings to be exceeded. the result is often a latchup which can be destructive if v in is reapplied. battery disconnect is possible as a result of mechanical stress, bad battery contacts or use of a lithium-ion battery
12 ltc1474/ltc1475 applicatio n s i n for m atio n wu u u figure 8. preventing absolute maximum ratings from being exceeded 1474/75 f08 v in v out latchup protection schottky sw ltc1474 ltc1475 + with a built-in internal disconnect. the user needs to assess his/her application to determine whether this situ- ation could occur. if so, additional protection is necessary. prevention against latchup can be accomplished by sim- ply connecting a schottky diode across the sw and v in pins as shown in figure 8. the diode will normally be reverse biased unless v in is pulled below v out at which time the diode will clamp the (v out C v in ) potential to less than the 0.6v required for latchup. note that a low leakage schottky should be used to minimize the effect on no-load supply current. schottky diodes such as mbr0530, bas85 and bat84 work well. another more serious effect of the protection diode leakage is that at no load with nothing to provide a sink for this leakage current, the output voltage can potentially float above the maximum allowable toler- ance. to prevent this from occuring, a resistor must be connected between v out and ground with a value low enough to sink the maximum possible leakage current. thermal considerations in the majority of the applications, the ltc1474/ltc1475 do not dissipate much heat due to their high efficiency. however, in applications where the switching regulator is running at high ambient temperature with low supply voltage and high duty cycles, such as dropout with the switch on continuously, the user will need to do some thermal analysis. the goal of the thermal analysis is to determine whether the power dissipated by the regulator exceeds the maximum junction temperature of the part. the temperature rise is given by: t r = p ? q ja where p is the power dissipated by the regulator and q ja is the thermal resistance from the junction of the die to the ambient temperature. the junction temperature is given by: t j = t a + t r as an example consider the ltc1474/ltc1475 in dropout at an input voltage of 3.5v, a load current of 300ma, and an ambient temperature of 70 c. from the typical perfor- mance graph of switch resistance, the on-resistance of the p-channel switch at 70 c is 3.5 w . therefore, power dissi- pated by the part is: p = i 2 ? r ds(on) = 0.315w for the msop package, the q ja is 150 c/w. thus the junction temperature of the regulator is: t j = 70 c + (0.315)(150) = 117 c which is near the maximum junction temperature of 125 o c. note that at higher supply voltages, the junction tempera- ture is lower due to reduced switch resistance. pc board layout checklist when laying out the printed circuit board, the following checklist should be used to ensure proper operation of the ltc1474/ltc1475. these items are also illustrated graphically in the layout diagram of figure 9. check the following in your layout: 1. is the schottky diode cathode closely connected to sw (pin 5)? 2. is the 0.1 m f input decoupling capacitor closely con- nected between v in (pin 7) and ground (pin 4)? this capacitor carries the high frequency peak currents. 3. when using adjustable version, is the resistive divider closely connected to the (+) and (C) plates of c out with a 10pf capacitor connected across r2? 4. is the 1000pf decoupling capacitor for the current sense resistor connected as close as possible to pins 6 and 7? if no current sense resistor is used, pins 6 and 7 should be shorted.
13 ltc1474/ltc1475 applicatio n s i n for m atio n wu u u figure 9. ltc1474/ltc1475 layout diagram (see board layout checklist) + + v out v in v in r sense v fb c out c in 10pf 1000pf r2 100k ltc1474 r1 d1 lbo lbi gnd run sense sw l 1474/75 f09 8 7 6 5 1 2 3 4 bold lines indicate high path currents 0.1 m f output divider required with adjustable version only 5. are the signal and power grounds segregated? the signal ground consists of the (C) plate of c out , pin 4 of the ltc1474/ltc1475 and the resistive divider. the power ground consists of the schottky diode anode, the (C) plate of c in and the 0.1 m f decoupling capacitor. 6. is a 100k resistor connected in series between run (pin 8) and the run control voltage? the resistor should be as close as possible to pin 8. design example (refer to r sense and inductor selection) as a design example, assume v in = 10v, v out = 3v, and a maximum average output current i max = 100ma. with this information, we can easily calculate all the important components: from the equation (1), r sense = (0.067/0.1) C 0.25 = 0.42 w using the standard resistors (1 w , 1 w and 2 w ) in parallel provides 0.4 w without having to use a more expensive low value current shunt type resistor (see r sense selec- tion section). with r sense = 0.4 w , the peak inductor current i peak is calculated from (2), neglecting the second term, to be 150ma. the minimum inductance is, therefore, from the equation (3) and assuming v d = 0.4v, l s h min = + ()() - = 075 33 04 475 015 01 264 .... .. m m from figure 3, an inductance of 270 m h is chosen from the recommended region. the cdrh73-271 or cd54-271 is a good choice for space limited applications. for the feedback resistors, choose r1 = 1m to minimize supply current. r2 can then be calculated from the equa- tion (4) to be: r v rm out 2 123 11143 =- ? ? ? ? = . . for the catch diode, the mbr0530 will work well in this application. for the input and output capacitors, avx 4.7 m f and 100 m f, respectively, low esr tps series work well and meet the rms current requirement of 100ma/2 = 50ma. they are available in small c case sizes with 0.15 w esr. the 0.15 w output capacitor esr will result in 25mv of output voltage ripple. figure 10 shows the complete circuit for this example.
14 ltc1474/ltc1475 typical applicatio n s u 1474/75 f10 v in gnd sense lbi run v fb lbo sw ltc1474 + 6 3 8 1 2 5 7 4 100k 1.43m 1% run 1000pf 4.7 f ? 35v 0.1 f v in 3.5v to 18v 1m 1% 2 w ** 1 w ** 1 w ** 10pf l* 270 h d1 mbr0530 + 100 f ?? 6.3v v out 3v 100ma * sumida cdrh73-271 ** 3 parallel standard resistors provide least expensive solution (see r sense selection section) ? avx tpsc475m035 ?? avx tpsc107m006 figure 10. high efficiency 3v/100ma regulator (design example) figure 11. high efficiency 3.3v/10ma output from 4ma to 20ma loop 1474/75 f11 v in gnd sense lbi run v out lbo sw ltc1474-3.3 6 3 8 1 2 5 7 4 100k run to a/d mbr0530 1000pf 1 f 3 in + 4ma to 20ma in 4ma to 20ma 2 w 7.5m 1m d2 ?? 12v l* 330 h d1 mbr0530 10 f** v out 3.3v 10ma * coilcraft do1608-334 ** marcon thcs50e1e106z, avx 1206zg106z ? optional resistor for sensing loop current by a/d converter ? ? motorola mmbz5242bl ?
15 ltc1474/ltc1475 typical applicatio n s u 1474/75 f12 v in gnd sense lbi run v fb lbo sw ltc1474 6 3 8 1 2 5 7 4 100k 4.7m 1% run 22 f** 16v v in 3.5v to 6v 536k 1% 10pf l* 200 h l* 200 h d1 mbr0530 + + + 22 f ?? 25v 22 f ?? 25v 10 f ? 25v + v out 12v 70ma v out 12v 70ma mbr0530 * coiltronics ctx200-4 ** avx tpsc226m016 ? avx tpsc106m025 ?? avx tpsd226m025 0.1 f v in (v) i load(max) 3.5 30ma 4 50ma 5 70ma 6 90ma figure 12. 5v to 12v regulator figure 13. 5v buck-boost converter 1474/75 f13 v in gnd sense lbi run v out lbo sw ltc1474-5 6 3 8 1 2 5 7 4 100k run 10 f** 25v 0.1 f v in 3.5v to 12v l* 100 h l* 100 h d1 mbr0530 + + + 33 f ? 10v 10 f** 25v v out 5v 200ma at v in = 10v * coiltronics ctx100-4 ** avx tpsc106mo25 ? avx tpsc336m010 v in (v) i load(max) 3.5 70ma 4 95ma 5 125ma 8 180ma 10 200ma 12 225ma
16 ltc1474/ltc1475 typical applicatio n s u figure 14. positive-to-negative (C 5v) converter 1474/75 f14 v in gnd sense lbi run v out lbo sw ltc1474-5 6 3 8 1 2 5 7 4 10 f** 25v 0.1 f v in 3.5v to 12v l* 100 m h d1 mbr0530 + + 33 f ? 10v v out 5v 140ma at v in = 5v * sumida cdrh74-101 ** avx tpsc106m025 ? avx tpsc336m010 ?? run: on/off = 0, shutdown: 0n/off = v in v in (v) i load(max) 3.5 100ma 5 140ma 8 190ma 12 240ma 10m on/off ?? tp0610 1474/75 f15 v in gnd sense lbi run v fb lbo sw ltc1474 6 3 8 1 2 5 7 4 100k 4.69m charger on/off 4.7 f** 35v 0.1 f v in 8v to 18v 1m 10pf l* 100 m h d1 mbr0530 mbr0530 + + 47 f ? 16v v out 4-nicd 200ma * sumida cdrh73-101 ** avx tpsc475m035 ? avx tpsd476m016 figure 15. 4-nicd battery charger
17 ltc1474/ltc1475 typical applicatio n s u figure 17. pushbutton on/off 5v/250ma regulator figure 18. ltc1475 regulator with 1-button toggle on/off 1474/75 f17 v in gnd sense lbi/off on v out lbo sw ltc1475-5 6 3 8 1 2 5 7 4 100k on off 4.7 f** 35v 0.1 f v in 5.7v to 18v 3.65m l* 100 m h d1 mbr0530 + + 33 f ? 10v v out 5v 250ma 1m * sumida cdrh73-101 ** avx tpsc475m035 ? avx tpsc336m010 1474/75 f18 v in gnd sense lbi/off on v out lbo sw ltc1475-3.3 6 3 8 1 2 5 7 4 100k on/off 4.7 f** 35v 0.1 f 0.1 f c v in 4v to 18v v cc l* 100 m h d1 mbr0530 + 100 f ? 6.3v v out 3.3v 250ma mmbd914lt1 2.2m 1m + * sumida cdrh73-101 ** avx tpsc475m035 ? avx tpsc107m006 figure 16. high efficiency 3.3v regulator with low battery lockout 1474/75 f16 v in gnd sense lbi run v out lbo sw ltc1474-3.3 6 3 8 1 2 5 7 4 100k run 4.7 f ? 35v 0.1 f v in 4v to 18v 2.2m 1m l* 100 m h d1 mbr0530 + + 100 f ?? 6.3v v out 3.3v 250ma * sumida cdrh73-101 ? avx tpsc475m035 ?? avx tpsc107m006
18 ltc1474/ltc1475 package descriptio n u dimensions in inches (millimeters) unless otherwise noted. ms8 package 8-lead plastic msop (ltc dwg # 05-08-1660) msop (ms8) 1197 * dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.006" (0.152mm) per side ** dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.006" (0.152mm) per side 0.021 0.006 (0.53 0.015) 0 ?6 typ seating plane 0.007 (0.18) 0.040 0.006 (1.02 0.15) 0.012 (0.30) ref 0.006 0.004 (0.15 0.102) 0.034 0.004 (0.86 0.102) 0.0256 (0.65) typ 12 3 4 0.192 0.004 (4.88 0.10) 8 7 6 5 0.118 0.004* (3.00 0.102) 0.118 0.004** (3.00 0.102)
19 ltc1474/ltc1475 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. s8 package 8-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) package descriptio n u dimensions in inches (millimeters) unless otherwise noted. 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 8 7 6 5 0.189 ?0.197* (4.801 ?5.004) 0.228 ?0.244 (5.791 ?6.197) 0.016 ?0.050 0.406 ?1.270 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) so8 0996 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) typ dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * **
20 ltc1474/ltc1475 typical applicatio n u 14745fa lt/tp 0398 4k rev a ? printed in usa ? linear technology corporation 1997 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 l (408) 432-1900 fax: (408) 434-0507 l telex: 499-3977 l www.linear-tech.com related parts part number description comments ltc1096/ltc1098 micropower sampling 8-bit serial i/o a/d converter i q = 80 m a max lt1121/lt1121-3.3/lt1121-5 150ma low dropout regulator linear regulator, i q = 30 m a ltc1174/ltc1174-3.3/ltc1174-5 high efficiency step-down and inverting dc/dc converters selectable i peak = 300ma or 600ma ltc1265 1.2a high efficiency step-down dc/dc converter burst mode operation, internal mosfet lt1375/lt1376 1.5a 500khz step-down switching regulators 500khz, small inductor, high efficiency switchers, 1.5a switch ltc1440/ltc1441/ltc1442 ultralow power comparator with reference i q = 2.8 m a max lt1495/lt1496 1.5 m a precision rail-to-rail op amps i q = 1.5 m a max lt1521/lt1521-3/lt1521-3.3/ 300ma low dropout regulator linear regulator, i q = 12 m a lt1521-5 ltc1574/ltc1574-3.3/ltc1574-5 high efficiency step-down dc/dc converters with internal schottky diode ltc1174 with internal schottky diode lt1634-1.25 micropower precision shunt reference i q(min) = 10 m a figure 19. pushbutton on/off with low battery lockout 1474/75 f19 v in gnd sense lbi/off on v fb lbo sw ltc1475 6 3 8 1 2 5 7 4 100k 1.02m 1% off on 4.7 f** 35v 0.1 f v in 3.5v to 18v 1m 1% 1.8m 10pf l* 100 m h d1 mbr0530 + + 100 f ? 6.3v v out 2.5v 250ma 1m mmbt2n2222lt1 1m * sumida cdrh73-101 ** avx tpsc475m035 ? avx tpsc107m006

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